A 400 KHz line rate 2048-pixel stitched SWIR linear array

Xenics developed a family of stitched 12.5 μm pitch SWIR line-arrays achieving line rates up to 400 KHz, based on a modular ROIC design with modules of 512 pixels, stitched during fabrication into 512, 1024 and 2048 pixel arrays, enabling longer arrays to run at a high line rate irrespective of the array length. The front-end circuit is based on a CTIA ensuring stable detector bias, good linearity and signal integrity, input auto-zero allowing low detector bias, and CDS reducing noise and offsets. The FPA has a pixel pitch of 12.5μm and has two pixel flavors: square (12.5x12.5 μm) and rectangular (12.5x250 μm). The ROIC is flip-chipped with InGaAs detector arrays, ensuring low parasitic capacitance and consequently low noise. Five gain modes have been implemented with input referred noise of 35e_rms in the highest gain mode. The FPA operates in Integrate While Read mode and, at a master clock rate of 60 MHz and a minimum integration time of 1.4 μs, achieves the highest line rate of 400 KHz. In this paper, design details and measurements results are presented in order to demonstrate the array performance.