Integrated low-power 24-channel EEG front-end

R. F. Yazicioglu; P. Merken; C. Van Hoof

doi:10.1049/el:20050159

Integrated low-power 24-channel EEG front-end

R. F. Yazicioglu, P. Merken, C. Van Hoof

Communication, Information, Systems and Sensors

Research output: Contribution to journal › Article › peer-review

Abstract

The first integrated CMOS multichannel electroencephalogram (EEG) readout front-end, capable of extracting EEG signals from conventional AgCl electrodes without the use of any trimmed components, is presented. Each channel of the ASIC achieves better than 90 dB common-mode rejection ratio (CMRR) at 50 Hz with 50 mV DC offset between EEG electrodes. This is consistent with the presented formula describing the CMRR behaviour of the preamplifier under DC electrode offset. The front-end includes 24 channels and consumes 10.5 mW from a 3 V supply.

Original language	English
Pages (from-to)	457-458
Number of pages	2
Journal	Electronics Letters
Volume	41
Issue number	8
DOIs	https://doi.org/10.1049/el:20050159
Publication status	Published - 14 Apr 2005

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Integrated low-power 24-channel EEG front-end

Abstract

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